1. Field of the Invention
This invention relates in general to semiconductor devices and more specifically to semiconductor devices with metal gate structures.
2. Description of the Related Art
Some transistors utilize metal gate structures for improved performance over similar transistors with only polycrystalline silicon (poly silicon) gates. For example, utilizing a metal gate structure may provide a transistor with a lower sheet resistance, proper threshold voltage, and improved performance.
Some transistors with metal gates include a poly silicon cap in the gate stack for improved integration with other transistor formation processes. One problem with using a poly silicon cap on a metal gate structure is that silicon may diffuse into the gate structure and into the gate dielectric below the gate structure. Such diffusion may occur, for example, during high temperature activation anneal of the source/drain regions. Silicon diffusion into the metal gate structure may lead to poor capacitance-voltage behavior and increased gate leakage as well as defect formation (e.g. the formation of silicon nodules or other non uniformities) in the metal gate structure. Silicon diffusion into the gate dielectric may produce defects in the gate dielectric that may reduce the dielectric constant (K value) of the gate dielectric and increase the electrical thickness of the gate dielectric.
What is needed is an improved process for forming a metal gate in a semiconductor device.
The use of the same reference symbols in different drawings indicates identical items unless otherwise noted. The Figures are not necessarily drawn to scale.